1. Field of the Invention
The present invention relates to a semiconductor device.
2. Description of the Related Art
When a semiconductor device is used in a portable device, downsizing of the semiconductor device is needed. A package called a Chip Size Package (hereinafter, called CSP) has therefore been developed. The CSP is similar in size to a semiconductor chip. A type of CSP is called a wafer level chip size package (Wafer Level Chip Size Package: WCSP) or wafer level chip scale package (Wafer Level Chip Scale Package: WCSP).
A structure of an external terminal which is used in WCSP is described in reference 1: Japanese Patent No. 3217046, and reference 2: Japanese Patent Laid-Open No. 2002-170427.
In the conventional WCSP, a top surface of a post electrode is coplanar with a surface of a sealing resin, and an external terminal is formed on the top surface of the post electrode. Accordingly, the external terminal is connected to the post electrode with a small area, and reliability of the connection might be reduced.